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  automotive power datasheet rev. 1.0, 2010-10-13 TLD5098EL dc/dc boost, buck-boost, sepic controller infineon ? power led driver www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 2 rev. 1.0, 2010-10-13 TLD5098EL table of contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 boost regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 oscillator and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 enable and dimming function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 linear regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9 protection and diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9.1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 10 analog dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10.1 purpose of analog dimming: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10.2 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 11 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 11.1 further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 12 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table of contents www.datasheet.net/ datasheet pdf - http://www..co.kr/
pg-ssop-14 type package marking TLD5098EL pg-ssop-14 tld5098 datasheet 3 rev. 1.0, 2010-10-13 dc/dc boost, buck-boos t, sepic controller TLD5098EL TLD5098EL 1overview features ? wide input voltage range from 4.5 v to 45 v ? constant current or constant voltage regulation ? drives leds in boost (b2g), buck-boost (b2b) and sepic topology ? very low shutdown current: i q_off < 10 a ? flexible switching frequency range, 100 khz to 500 khz ? synchronization with external clock source ?pwm dimming ? analog dimming feature to adjust average led current ? internal 5 v low drop out voltage regulator ? open circuit detection ? short to gnd protection ? output overvoltage protection ? internal soft start ? over temperature shutdown ? wide led current range via simple adaptation of external components ? 300mv high side current sens e to ensure highest flexib ility and led current accuracy ? available in a small thermally enhanced pg-ssop-14 package ? automotive aec qualified ? green product (rohs) compliant description the TLD5098EL is a led boost controller with built in protecti on features. the main function of this device is to regulate a constant led current. the c onstant current regulation is especially beneficial for led color accuracy and longer lifetime. the controller co ncept of the TLD5098EL allows multip le configurations such as boost, buck/boost and sepic by simply adjusting the external components. the TLD5098EL offers the most flexible dimming options. dimming can be achieved with analog or pwm input.the switching frequency is adjustable in the range of 100 khz to 500 khz and can be synchronized to an external clock source. the TLD5098EL features an enable function reducing the s hut-down current consumption to i q_off < 10 a. the current mode regulation scheme of this device provides a stable regulation lo op maintained by small external compensation components. the integrated soft start feat ure limits the current peak as well as voltage overshoot at start-up. this ic is suited for use in the harsh automotive envir onments and provides output overvolta ge protection, devic e overtemperature shutdown and short circuit to gnd protection. applications ? automotive exterior and interior lighting www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL block diagram datasheet 4 rev. 1.0, 2010-10-13 2 block diagram figure 1 block diagram en / pwmi comp in fbl fbh freq / sync gnd set oscillator 14 13 10 8 12 swcs swo 2 ivcc ldo ovfb sgnd soft start slope comp. internal supply on/off logic leading edge blanking 5 pwmo en_int/ pwm_int thermal protection open load + short to gnd detection over volage protection pwm generator power switch gate driver feedback voltage error amplifier dimming switch gate driver power on reset en_int/ pwm_int switch current error amplifier reference current generation 11 1 3 4 9 6 7 www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 5 rev. 1.0, 2010-10-13 TLD5098EL pin configuration 3 pin configuration 3.1 pin assignment figure 2 pin configuration 3.2 pin definitions and functions pin symbol function 1ivcc internal ldo output; used for internal biasing and gate drive. bypass with external capacitor close to the pin. pin must not be left open. 2swo switch output; connect to gate of external switching mosfet 3sgnd current sense ground; ground return for current sense switch 4swcs current sense input; detects the peak current through switch 5pwmo pwm dimming output; connect to gate of external mosfet 6fbh voltage feedback positive; non inverting input (+) 7fbl voltage feedback negative; inverting input (-) 8comp compensation input; connect r and c networ k to pin for stability in comp ovfb set freq/sync gnd en/pwmi ivcc fbl pwmo sgnd swcs swo 1 2 3 4 5 6 7 14 9 10 11 12 13 8 pinconfig_ssop-14_5098.svg fbh exposed pad www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL pin configuration datasheet 6 rev. 1.0, 2010-10-13 9ovfb output overvoltage protection feedback; connect to resistive voltage divi der to set overvoltage threshold. 10 set analog dimming input; load current adjustment pin. pin must not be left open. if anal og dimming feature is not used connect to ivcc pin. 11 freq / sync frequency select or synchronization input; connect external resistor to gnd to set frequency. or apply external clock signal for synchronization within frequency capture range. 12 gnd ground; connect to system ground. 13 en / pwmi enable or pwm input; apply logic high signal to enable de vice or pwm signal for dimming led. 14 in supply input; supply for internal biasing. ep exposed pad; connect to external heatspreading gnd cu area (e.g. inner gnd layer of multilayer pcb with thermal vias). pin symbol function www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 7 rev. 1.0, 2010-10-13 TLD5098EL general product characteristics 4 general product characteristics 4.1 absolute maximum ratings absolute maximum ratings 1) t j = -40 ? c to +150 ? c; all voltages with resp ect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. max. voltages 4.1.1 in supply input v in -0.3 45 v ? 4.1.2 en / pwmi enable or pwm input v en -40 45 v ? 4.1.3 fbh-fbl feedback error amplifier differential v fbh -v fbl -40 61 v the maximum delta must not exceed 61v 4.1.4 fbh feedback error amplif ier positive input v fbh -40 61 v the difference between v fbh and v fbl must not exceed 61v, refer to parameter 4.1.3 4.1.5 fbl feedback error amplif ier negative input v fbl -40 61 v the difference between v fbh and v fbl must not exceed 61v, refer to parameter 4.1.3 4.1.6 fbh and fbl current i fbl,fbh ? 1 ma t < 100ms, v fbh - v fbl = 0.3v 4.1.7 ovfb over voltage feedback input v ovp -0.3 5.5 v ? 4.1.8 -0.3 6.2 v t < 10s 4.1.9 swcs switch current sense input v swcs -0.3 5.5 v ? 4.1.10 -0.3 6.2 v t < 10s 4.1.11 swo switch gate drive output v swo -0.3 5.5 v ? 4.1.12 -0.3 6.2 v t < 10s 4.1.13 sgnd current sense switch gnd v sgnd -0.3 0.3 v ? 4.1.14 comp compensation input v comp -0.3 5.5 v ? 4.1.15 -0.3 6.2 v t < 10s 4.1.16 freq / sync; frequency and synchronization input v freq / sync -0.3 5.5 v ? 4.1.17 -0.3 6.2 v t < 10s 4.1.18 pwmo pwm dimming output v pwmo -0.3 5.5 v ? 4.1.19 -0.3 6.2 v t < 10s 4.1.20 set v set -0.3 45 v ? 4.1.21 ivcc internal linear voltage regulator output v ivcc -0.3 5.5 v ? 4.1.22 -0.3 6.2 v t < 10s temperatures 4.1.23 junction temperature t j -40 150 c? www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL general product characteristics datasheet 8 rev. 1.0, 2010-10-13 note: stresses above the ones listed here may cause perm anent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation. 4.2 functional range note: within the functional range the ic operates as de scribed in the circuit description. the electrical characteristics are specifi ed within the conditions given in the re lated electrical ch aracteristics table. 4.1.24 storage temperature t stg -55 150 c? esd susceptibility 4.1.25 esd resistivity of all pins v esd,hbm -2 2 kv hbm 2) 4.1.26 esd resistivity of in, en/pwmi, fbh, fbl and set pin to gnd v esd,hbm -4 4 kv hbm 2) 1) not subject to production test, specified by design. 2) esd susceptibility, human body model ?hbm? according to eia/jesd 22-a114b pos. parameter symbol limit values unit conditions min. max. 4.2.1 extended supply voltage range v in 4.5 45 1) 1) not subject to production test, specified by design. v v ivcc > v ivcc,rth,d; parameter deviations possible 4.2.2 nominal supply voltage range v in 834v? 4.2.3 feedback voltage input v fbh; v fbl 360v? 4.2.4 junction temperature t j -40 150 c? absolute maximum ratings 1) t j = -40 ? c to +150 ? c; all voltages with resp ect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. max. www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 9 rev. 1.0, 2010-10-13 TLD5098EL general product characteristics 4.3 thermal resistance note: this thermal data was generated in accordance wit h jedec jesd51 standards. fo r more information, go to www.jedec.org . pos. parameter symbol limi t values unit conditions min. typ. max. 4.3.1 junction to case 1) 2) 1) not subject to production test, specified by design. 2) specified rthjc value is simulated at natural convection on a cold plate setup (all pins and the exposed pad are fixed to ambient temperature). ta=25c; the ic is dissipating 1w. r thjc ?10?k/w? 4.3.2 junction to ambient 1) 3) 3) specified r thja value is according to jedec 2s2p (jesd 51-7) + (jesd 51-5) and jedec 1s0p (jesd 51-3) + heatsink area at natural convection on fr4 board; the device was simulated on a 76.2 x 114.3 x 1.5 mm board. the 2s2p board has 2 outer copper layers (2 x 70m cu) and 2 inner copper layers (2 x 35m cu). a thermal via (diameter = 0.3 mm and 25 m plating) array was applied under the exposed pad and conn ected the first outer layer (top) to the first inner layer and second outer layer (bottom) of the jedec pcb. ta=25c; the ic is dissipating 1w. r thja ? 47 ? k/w 2s2p 4.3.3 r thja ? 54 ? k/w 1s0p + 600 mm 2 4.3.4 r thja ? 64 ? k/w 1s0p + 300 mm 2 www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL boost regulator datasheet 10 rev. 1.0, 2010-10-13 5 boost regulator 5.1 description the TLD5098EL regulator is suitable for boost, buck- boost and sepic confi gurations. the consta nt output current is especially useful for light emitting diode (led) applic ations. the regulator function is implemented by a pulse width modulated (pwm) cu rrent mode controller. the pwm current mode controller uses the peak current thro ugh the external power switch and error in the output current to determine the appropriate pulse width duty cycle (on time) for constant output current. the current mode controller provides a pwm signal to an internal gate driver which then outputs to an external n-channel enhancement mode metal oxide field effe ct transistor (mosfet) power switch. the current mode controller also has built-in slope compensation to prevent sub-harmonic oscillations which is a characteristic of current mode controllers operating at high duty cycles (>50% duty). an additional built-in feature is an int egrated soft start that limits the current through the inductor and external power switch during initialization. th e soft start function gradually increase s the inductor and switch current over t ss (parameter 5.2.9 ) to minimize potential overvoltage at the output. figure 3 boost regulator block diagram oscillator freq/ sync & & r q s off when h q clock > 1 error -ff low when t j > 175 c ea fbh comp h when ovfb >1.25 v output stage off when low nor & nand 2 & & r q s q pwm-ff 1 inv gate driver gate driver supply swo ivcc current sense i soft start v ref 0.3v = slope comp t fbl x1 gmea v ref 1.25v = sgnd swcs current comp ovfb i sl o pe i ea i cs high when l ea -i slope -i cs >0 v ref 4.0 v = high when ivcc < 4.0v uv ivcc ov fb set v v ref 0 1 0 if set < 1.6 v 5 ) 1 . 0 ( v set ? 9 8 6 7 10 11 1 2 4 3 www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 11 rev. 1.0, 2010-10-13 TLD5098EL boost regulator 5.2 electrical characteristics 1) table 1 ec boost regulator v in = 8v to 34v; t j = -40 ? c to +150 ? c, all voltages with respect to ground, po sitive current flowing into pin; (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. regulator: 5.2.1 feedback reference voltage v ref 0.29 0.30 0.31 v refer to figure 25 v ref = v fbh -v fbl v set = 5v i led = 350 ma 5.2.2 feedback reference voltage v ref 0.057 0.06 0.063 v refer to figure 25 v ref = v fbh -v fbl v set = 0.4v i led = 70ma 5.2.3 feedback reference voltage offset v ref_offset ??5mv refer to figure 17 and figure 25 v ref = v fbh -v fbl v set = 0.1v v out >v in 5.2.4 voltage line regulation ( v ref / v ref ) / v in ? ? 0.15 %/v refer to figure 25 v in = 8v to 19v; v set = 5v; i led = 350ma 5.2.5 voltage load regulation ( v ref / v ref ) / i bo ??5%/v refer to figure 25 v set = 5v; i led = 100 to 500ma 5.2.6 switch peak over current threshold v swcs 130 150 170 mv v fbh = v fbl = 5v v comp = 3.5v 5.2.7 maximum duty cycle d max,fixed 91 93 95 % fixed frequency mode 5.2.8 maximum duty cycle d max,sync 88 ? ? % synchronization mode 5.2.9 soft start ramp t ss 350 1000 1500 s v fb rising from 5% to 95% of v fb , typ. 5.2.10 ifbh feedback high input current i fbh 38 46 54 a v fbh - v fbl = 0.3v 5.2.11 ifbl feedback low input current i fbl 15 21 27 a v fbh - v fbl = 0.3v 5.2.12 switch current sense input current i swcs 10 50 100 a v swcs = 150mv 5.2.13 input undervoltage shutdown v in,off 3.5? 4.5v v in decreasing 5.2.14 input voltage startup v in,on ? ? 4.85 v v in increasing 1) not subject to production test, specified by design www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL boost regulator datasheet 12 rev. 1.0, 2010-10-13 gate driver for external switch 5.2.15 gate driver peak sourcing current i swo,src ?380?ma 1) v swo = 1v to 4v 5.2.16 gate driver peak sinking current i swo,snk ?550?ma 1) v swo = 4v to 1v 5.2.17 gate driver output rise time t r,swo ?3060ns 1) c l,swo = 3.3nf; v swo = 1v to 4v 5.2.18 gate driver output fall time t f,swo ?2040ns 1) c l,swo = 3.3nf; v swo = 4v to 1v 5.2.19 gate driver output voltage v swo 4.5? 5.5v 1) c l,swo = 3.3nf; 1) not subject to production test, specified by design table 1 ec boost regulator v in = 8v to 34v; t j = -40 ? c to +150 ? c, all voltages with respect to ground, po sitive current flowing into pin; (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 13 rev. 1.0, 2010-10-13 TLD5098EL oscillator and synchronization 6 oscillator and synchronization 6.1 description the internal oscillator is used to dete rmine the switching frequency of the b oost regulator. the switching frequency can be selected from 100 khz to 500 khz with an external resistor to gnd. to set the switching frequency with an external resistor the following formula can be applied. in addition, the oscillator is capable of changing from the frequency set by th e external resistor to a synchronized frequency from an external clock source. if an external cl ock source is provided on the pin freq/sync, then the internal oscillator syn chronizes to this external clock frequency and the boost regulator switches at the synchronized frequency. the synchronization frequency capture range is 250 khz to 500 khz. figure 4 oscillator and synchronization block diagram and simplified application circuit figure 5 synchronization timing diagram oscillator clock frequency detector freq / sync multiplexer pwm logic gate driver swo r freq v clk 11 2 v sync t t sync,tr t sync,tr v sync,h v sync,l t sync = 1 / f sync t sync,pwh 4.5 v 0.5 v [] () [] () [] ( ) [] ? = ? 3 1 12 10 5 . 3 10 141 1 s freq s f r freq www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL oscillator and synchronization datasheet 14 rev. 1.0, 2010-10-13 6.2 electrical characteristics table 2 ec oscillator and synchronization v in = 8v to 34v; t j = -40 ? c to +150 ? c, all voltages with respect to ground, po sitive current flowing into pin; (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. oscillator: 6.2.1 oscillator frequency f freq 250 300 350 khz r freq = 20k 6.2.2 oscillator frequency adjustment range f freq 100 ? 500 khz 6.2.3 freq / sync supply current i freq ? ? -700 a v freq = 0v 6.2.4 frequency voltage v freq 1.16 1.24 1.32 v f freq = 100khz synchronization 6.2.5 synchronization frequency capture range f sync 250 ? 500 khz ? 6.2.6 synchronization signal high logic level valid v sync,h 3.0 ? ? v 1) 2) 1) synchronization of external pwm on signal to falling edge 2) not subject to production test, specified by design 6.2.7 synchronization signal low logic level valid v sync,l ??0.8v 1) 2) 6.2.8 synchronization signal logic high pulse width t sync,pwh 200 ? ? ns 1) 2) www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 15 rev. 1.0, 2010-10-13 TLD5098EL oscillator and synchronization typical performance characteristics of oscillator switching frequency f sw versus frequency select resistor to gnd r freq/sync 0 100 200 300 400 500 600 0 1020304050607080 r freq/sync [kohm] f freq [khz] t j = 25 c www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL enable and dimming function datasheet 16 rev. 1.0, 2010-10-13 7 enable and dimming function 7.1 description the enable function powers on or o ff the device. a valid logic low signal on enable pin en/pwmi powers off the device and current consumption is less than i q_off (parameter 7.2.14 ). a valid logic high enable signal on enable pin en/pwmi powers on the device. the enable fu nction features an integrat ed pull down resistor which ensures that the ic is shut down and the power swit ch is off in case the enable pin en is left open. in addition to the enable function described above, th e en/pwmi pin detects a pulse width modulated (pwm) input signal that is fed through to an internal gate driver. t he internal gate driver outputs the same pwm signal on the pwmo pin to an external n-channel enhancement mo de mosfet for pwm dimming an led load. pwm dimming an led is a commonly practiced dimming method and can prevent color shift in an led light source. moreover the pwm output function may also be used to drive other types of loads besides led. the enable and pwm input function share the same pin. therefore a valid logic low signal at the en/pwmi pin needs to differentiate between an enable power off or an pwm dimming low signal. the device differentiates between enable off and pwm dimming signal by requirin g the enable off at the en/p wmi pin to stay low for the enable turn off delay time (t en,off,del parameter 7.2.6 ). figure 6 block diagram and simplified application circuit enable and led dimming en / pwmi in 13 swo 2 ivcc 1 ldo enable / pwmi logic 5 pwmo 14 gate driver microcontroller gate driver enable enable pwmi www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 17 rev. 1.0, 2010-10-13 TLD5098EL enable and dimming function figure 7 timing diagram enable and led dimming 7.2 electrical characteristics table 3 ec enable and dimming v in = 8v to 34v; t j = -40 ? c to +150 ? c, all voltages with respect to ground, po sitive current flowing into pin; (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. enable/pwm input: 7.2.1 enable/pwmi turn on threshold v en/pwmi,on 3.0 ? v ? 7.2.2 enable/pwmi turn off threshold v en/pwmi,off ??0.8v? 7.2.3 enable/pwmi hysteresis v en/pwmi,hys 50 200 400 mv 1) v en/pwmi v en/pwmi,on v ivcc v ivcc,on v pwmo v swo v en/pwmi,off t en,off,del t t t t v ivcc,rth power off iq_off power off delay time normal swo on pwmo on dim pwmo off swo off t pwmi,h t pwmi dim pwmo off swo off power on normal swo on pwmo on normal swo on pwmo on t freq = 1 f freq t en,start www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL enable and dimming function datasheet 18 rev. 1.0, 2010-10-13 7.2.4 enable/pwmi high input current i en/pwmi,h ??30a v en/pwmi = 16.0v 7.2.5 enable/pwmi low input current i en/pwmi,l ?0.11a v en/pwmi = 0.5v 7.2.6 enable turn off delay time t en,off,del 8 1012ms? 7.2.7 pwmi min duty time t pwmi,h 4??s? 7.2.8 enable startup time t en,start 100 ? ? s 1) gate driver for dimming switch: 7.2.9 pwmo gate driver peak sourcing current i pwmo,src ? 230 ? ma 1) v pwmo = 1v to 4v 7.2.10 pwmo gate driver peak sinking current i pwmo,snk ? 370 ? ma 1) v pwmo = 4v to 1v 7.2.11 pwmo gate driver output rise time t r,pwmo ? 50 100 ns 1) c l,pwmo = 3.3nf; v pwmo = 1v to 4v 7.2.12 pwmo gate driver output fall time t f,pwmo ? 3060ns 1) c l,pwmo = 3.3nf; v pwmo = 4v to 1v 7.2.13 pwmo gate driver output voltage v pwmo 4.5 ? 5.5 v 1) c l,pwmo = 3.3nf; current consumption 7.2.14 current consumption, shutdown mode i q_off ??10a v en/pwmi = 0.8 v; t j 105c; v in = 16v 7.2.15 current consumption, active mode 2) i q_on ??7ma v en/pwmi 4.75v; i bo = 0ma; v swo = 0% duty cycle 1) not subject to production test, specified by design 2) dependency on switching frequency and gate charge of boost and dimming switch. table 3 ec enable and dimming v in = 8v to 34v; t j = -40 ? c to +150 ? c, all voltages with respect to ground, po sitive current flowing into pin; (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 19 rev. 1.0, 2010-10-13 TLD5098EL linear regulator 8 linear regulator 8.1 description the internal linear voltage regulator supplies the internal gate drivers with a typical voltage of 5v and current up to i lim,min (parameter 8.2.2 ). an external output capa citor with esr lower than r ivcc,esr (parameter 8.2.5 ) is required on pin ivcc for stability and buff ering transient load currents. during normal operation the external boost and dimming mosfet switches will draw transient currents from the linear regulator and its output capacitor. proper sizing of the output capacitor must be consider ed to supply sufficient peak current to the gate of the external mosfet switches. integrated undervoltage protection for the external switching mosfet: an integrated undervoltage reset threshold circui t monitors the linear regulator output voltage (v ivcc ) and resets the device in case the output voltage falls below the ivcc undervoltage reset switch off threshold ( v ivcc,rth,d parameter 8.2.7 ). the undervoltage reset threshold for the ivcc pin helps to protect the external switches from excessive power dissipation by ensuring the gate drive voltage is sufficient to enhance the gate of an external logic level n-channel mosfet. figure 8 voltage regulator block diagra m and simplified application circuit en / pwmi in 13 ivcc 1 linear regulator 14 gate drivers www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL linear regulator datasheet 20 rev. 1.0, 2010-10-13 8.2 electrical characteristics table 4 ec line regulator v in = 8v to 34v; t j = -40 ? c to +150 ? c, all voltages with respect to ground, po sitive current flowing into pin; (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 8.2.1 output voltage v ivcc 4.85 5 5.15 v 6v v in 45v 0.1ma i ivcc 50ma 8.2.2 output current limitation i lim 51 ? 90 ma v in = 13.5v v ivcc = 4.5v 8.2.3 drop out voltage v dr ??0.5v v in = 4.5v i ivcc = 25ma 8.2.4 ivcc buffer capacitor c ivcc 0.47 1 100 f 1) 2) 1) not subject to production test, specified by design 2) minimum value given is needed for regulator stability; a pplication might need higher capacitance than the minimum. 8.2.5 ivcc buffer capacitor esr r ivcc,esr ??0.5 1) 8.2.6 undervoltage reset headroom v ivcc,hdrm 100 ? ? mv v ivcc decreasing v ivcc - v ivcc,rth,d 8.2.7 ivcc undervoltage reset switch off threshold v ivcc,rth,d 3.6 ? 4.0 v 3) v ivcc decreasing. 3) selection of external switchin g mosfet is crucial and the v ivcc,rth,d min. as worst case v gs must be considered. 8.2.8 ivcc undervoltage reset switch on threshold v ivcc,rth,i ??4.5v v ivcc increasing www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 21 rev. 1.0, 2010-10-13 TLD5098EL protection and diagnostic functions 9 protection and diag nostic functions 9.1 description the TLD5098EL has integrated circuits to diagnose and protect against output overvoltage, open load, open feedback and overtemperature faults. additionally the fb h and fbl potential is monitored and in case the led load short circuits to gnd (see description figure 15 ) the regulator stops the operation and protects the system. in case any of the six faul t conditions occur th e pwmo and ivcc signal will chan ge to an active logic low signal to communicate that a fault has occurred (detailed overview in figure 9 and figure 10 below). figure 11 illustrates the various open lo ad and open feedback conditions. in case of an overtemper ature cond ition the integrated thermal shutdown function tu rns off the gate drivers and internal linear voltage regulator. the typical junction shutdown temperature is 175c (t j,sd parameter 9.2.2 ). after cooling down the ic will automatically restart. thermal shutdown is an integrated protection function designed to prevent ic destruction and is not intended for continuous use in normal operation ( figure 13 ). to calculate the proper overvoltage protection resistor values an example is given in figure 14 . figure 9 protection and diagnostic function block diagram output overvoltage open load overtemperature protection and diagnostic circuit or swo and pwmo gate driver off linear regualtor off input output open feedback input undervoltage short to gnd or www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL protection and diagnostic functions datasheet 22 rev. 1.0, 2010-10-13 figure 10 diagnosis truth table figure 11 open load and open feedback conditions output swo pwmo ivcc input overvoltage @ output open load overtemperature l l level * false true condition h or sw * sw* active l l h or sw * sw* l l shutdown h or sw * sw* *note: sw = switching false = condition does not exist true = condition does exist false true false true open feedback l l h or sw * sw* false true active active active active active active under voltage @ input l l false true h or sw * sw* active shutdown short to gnd @ led chain l l h or sw * sw* false true active active fbh fbl ovfb pwmo r ovh r ovl r fb t dim 5 7 6 9 d 1 d 2 d 3 d 4 d 5 d 6 d 7 d 8 d 9 d 10 overvoltage compartor feedback voltage error amplifier v bo open circuit 1 open circuit 2 open circuit 3 open circuit 4 + v ref - v ovfb,th open circuit condition 1 fault condition open fbh 2 3 4 open fbl open vbo open pwmo fault threshold voltage v ref -20 to -100 mv 0.5 to 1.0 v -20 to -100 mv detected by overvoltage v ref min threshold = 0.5 v max threshold = -20 mv max threshold = 1.0 v min threshold = -100 mv open fbl open fbh open v bo typical v ref = 0.3 v output open circuit conditions www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 23 rev. 1.0, 2010-10-13 TLD5098EL protection and diagnostic functions figure 12 open load, overvoltage and overtemperature timing diagram shutdown normal thermal shutdown overvoltage open load / feedback startup v ivcc v fbh- v fbl t v pwmo t t j t t v ref,2 v ref,1 t j,sd t j,sd,hyst v ivcc,rth,i v ivcc,rth,d 0.3 v typ t ss t ss 1 1 2 3 3 v bo t v ovfb v ovfb,th 2 v in v ovfb,hys www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL protection and diagnostic functions datasheet 24 rev. 1.0, 2010-10-13 figure 13 device overtemperature protection behavior v swo t i led t ? v en/pwmi t h l t j t ta t jsd t jso i peak t normal operation device off overtemp fault on overtemp fault on overtemp fault on overtemp fault v ivcc 5v v pwmo t www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 25 rev. 1.0, 2010-10-13 TLD5098EL protection and diagnostic functions figure 14 overvoltage protection description short to gnd protection for highside return applications (b2b) from figure 23 the fbh and fbl pins features a sh ort to gnd detection threshold (v fbl,fbh_s2g ). if the potential on those pins is below this threshold the device stops his operation. this means that the pwmo signal changes to inactive state (low potential) and the corresponding p-channel (t dim2 ) is switched off accordingly and protects the led chain. for the b2b application some external components are n eeded to ensure a low potential during a short circuit event. d1 and d2 are low power diod es (bas16-03w) and the resistor r lim (10kohm) is needed to limit the current through this path. the diode d3 should be a high power diode and is needed to protect the r fb and the fbh and fbl pins in case of an short circuit to gnd event. this short circuit detection and pr otection concept considers potential faults for led chains (led modules) which are separated from the ecu via two wires (at the beginning and at the end of the led chain). if th e short circuit condition disappears, the device will re-start with an soft start. figure 15 short circuit to gnd protection v ovfb t v ovfb,th 1.25v overvoltage protection is disabled overvoltage protection active v ovp,max ovfb tld5098 gnd example : v out,max=40v 9 r ovl r ovh 1.25v 1k ? 1.25ma ? k ma v 2 . 33 25 . 1 40 12 v fbl,fbh t v fbl,fbh_s2g short circuit detected on fbh/fbl device working with parameter deviations 4.5v normal operation 60v in fbh fbl swo swcs pwmo sgnd c in t dim1 l bo d bo i led v out r fb d 1 d n t dim2 t sw i sw c bo d3 short to gnd short to gnd d2 rlim d1 v bb wire harness wire harness led module www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL protection and diagnostic functions datasheet 26 rev. 1.0, 2010-10-13 9.2 electrical characteristics note: integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation. table 5 ec protection and diagnosis v in = 8v to 34v; t j = -40 ? c to +150 ? c, all voltages with respect to ground, po sitive current flowing into pin; (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. short circuit protection 9.2.1 fbh and fbl short-circuit fault sensing common mode range v fbl,fbh_s2g 1.5 ? 2 v refer to figure 15 v fbh = v fbl decreasing temperature protection: 9.2.2 over temperature shutdown t j,sd 160 175 190 c 1) refer to figure 13 1) specified by design; not subject to production test. 9.2.3 over temperature shutdown hystereses t j,sd,hyst ?15?c 1) overvoltage protection: 9.2.4 output over voltage feedback threshold increasing v ovfb,th 1.21 1.25 1.29 v refer to figure 14 9.2.5 output over voltage feedback hysteresis v ovfb,hys 50 ? 150 mv 1) output voltage decreasing 9.2.6 over voltage reaction time t ovprr 2 ? 10 s output voltage decreasing 9.2.7 over voltage feedback input current i ovfb -1 0.1 1 a v ovfb = 1.25v open load and open feedback diagnostics 9.2.8 open load/feedback threshold v ref,1,3 -100 ? -20 mv refer to figure 11 v ref = v fbh - v fbl open circuit 1 or 3 9.2.9 open feedback threshold v ref,2 0.5 ? 1 v v ref = v fbh - v fbl open circuit 2 www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 27 rev. 1.0, 2010-10-13 TLD5098EL analog dimming 10 analog dimming this pin is influencing the feedback voltage error amplifie r by generating an internal current accordingly to an external reference voltage (v set ). if the analog dimming feature is not ne eded this pin must be connected to ivcc or external > 1.6v supply. different application scenarios are described in figure 18 . this pin can also go outside of the ecu for instance if a thermist or is connected on a separated led mo dule and the analog dimming input is used to thermally protect the leds. for reverse battery prot ection of this pin an external series resistor should be placed to limit the current. 10.1 purpose of analog dimming: 1) it is difficult for led manufacturers to deliver leds which have the same brightness, colorpoint and forward voltage class. due to this relatively wide spread of the crucial led parameters automotive customers order leds from one or maximum two different colorpoint classes. the led manufacturer must preselect the leds to deliver the requested colorpoint class. those preselected leds are matched in terms of the colorpoint but a variation of the brightness remains. to correct the brightness deviat ion an analog dimming feature is needed. the mean led current can be adjusted by applying an external voltage v set at the set pin. 2) if the dc/dc application is separated from the le d loads the ecu manufacturers aim is to develop one hardware which should be able to handle different load current conditions (e.g. 80ma to 400ma) to cover different applications. to achieve this average led current ad justment the analog dimming is a crucial feature. 10.2 description application example: desired led current = 400ma. for the calculation of the correct feedback resistor r fb the following equation can be used: this formula is va lid if the analog dimming feature is disabled and v set > 1.6v. a decrease of the average led current can be ac hieved by controlling the voltage at the set pin (v set ) between 0v and 1.6v. the mathematical relation is given in the formula below: if v set is 100mv the led current is only determined by the internal offset voltages of the comparators. for this example i led = 0a if v set < 100mv. refer to the concept drawing in figure 17 . fb ref led r v i = led ref fb i v r = = = m ma v r fb 750 400 3 . 0 fb set led r v v i * 5 1 , 0 ? = www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL analog dimming datasheet 28 rev. 1.0, 2010-10-13 figure 16 voltage v set versus led current figure 17 concept drawing analog dimming v ref [v] v set [v] 100 mv 1.6v analog dimming feature enabled typ. 300mv analog dimming disabled fb ref led r v i = fb set led r v v i * 5 1 . 0 ? = comp fbh fbl gnd set r fb v ref i led r 2 v ref_offset + - feedback voltage error amplifier r 1 + + - r 3 r comp c comp v bandgap = 1.6v v out v set 100mv v int i set n*i set i set i fbh i fbl 7 6 10 12 8 www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 29 rev. 1.0, 2010-10-13 TLD5098EL analog dimming multi-purpose usage of the analog dimming feature 1) a c integrated digital analog converter (dac) output or a stand alone dac can be used to supply the set pin of the TLD5098EL. the integrated voltage regulator (v ivcc ) can be used to supply the c or external components if the current consumpti on does not exceed 25ma. 2) the analog dimming feature is directly connected to the input voltage of the system. in this configuration the led current is reduced if the input voltage v in is decreasing. the dc/dc boost converter is changing (increasing) the switching duty cycle if v in drops to a lower potential. this is causing an increase of the input current consumption. if applicat ions require a decrease of the led current in respect to vin variations this setup can be choosen. 3) the usage of an external resistor divider connected between ivcc (integrated 5v regulator output and gate buffer pin) set and gnd can be choosen for systems wit hout c on board. the concept allows to control the led current via placing cheap low power resistors. furthermore a temperature sensitive resistor (thermistor) to protect the led loads from thermal destruction can be connected additionally. 4) if the analog dimming feature is not needed the set pin must be connected directly to >1.6v potential (e.g. ivcc potential) 5) instead of an dac the c can provide a pwm signal and an external r-c filter is producing a constant voltage for the analog dimming. the voltage level is depending on the pwm frequency (f pwm ) and duty cycle (dc) which can be controlled by the c softw are after reading the coding resist or placed at the led module. www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL analog dimming datasheet 30 rev. 1.0, 2010-10-13 . figure 18 analog dimming in various applications set c d/a-output gnd v set set gnd v set in v bb set gnd v set ivcc v ivcc = +5v r set1 r set2 c filter c filter r set1 r set2 c ivcc set gnd v set ~ v ivcc ivcc v ivcc = +5v c filter r filter 1 2 3 4 ivcc c ivcc r filter pwm set c (e.g. xc866) pwm output gnd v set c filter ivcc +5v c ivcc 5 +5v c ivcc 1 12 10 14 12 10 1 12 10 1 12 10 1 12 10 www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 31 rev. 1.0, 2010-10-13 TLD5098EL analog dimming 10.3 electrical characteristics table 6 ec analog dimming v in = 8v to 34v; t j = -40 ? c to +150 ? c, all voltages with respect to ground, po sitive current flowing into pin; (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. analog dimming range 10.3.1 set programming range v set 0?1.6v 1) refer to figure 16 1) specified by design; not subject to production test. www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL application information datasheet 32 rev. 1.0, 2010-10-13 11 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. figure 19 led low side return applic ation circuit (boost to gnd, b2g) figure 20 bill of materials for led low side return application circuit en / pwmi comp in fbh fbl ovfb swo swcs freq / sync pwmo gnd sgnd ic 1 tld5098 set v batt v bo v in ivcc provisional parts i bo i sw c in c 1 c 2 l 1 d rv l bo d bo t sw r cs r freq r comp c comp c ivcc r ovh r ovl c bo r fb t dim 14 13 11 8 1 12 5 7 6 9 3 4 2 d 1 d 2 d 3 d 4 d 5 d 6 d 7 d 8 d 9 d 10 v ref i led ic 2 microcontroller (e.g. xc866) output output 10 input pwm - output r filter c filter pwm v cc or v ivcc classic boost setup: vout > vin l bo reference designator d bo part number manufacturer c in , c bo t dim ,t sw r cs r fb r ovh d 1 - 10 r ovl c comp r comp c ivcc r freq ic 2 ic 1 osram lw w5sm vishay coilcraft mss1278t-104ml eeefk1h101gp panasonic value white 100 uh 100 uf, 50v epcos type led diode capacitor capacitor capacitor ic ic inductor resistor resistor resistor resistor resistor resistor transistor epcos 1uf , 6.3v mlcc ccnpzc105kbw x7r infineon tld5098 -- infineon xc866 -- infineon ipg20n06s4l-26 dual n-ch enh. (60v, 20a) 820 m ? , 1% panasonic erj14bqfr82u 20 k ? , 1% panasonic erj3ekf 2002v 33.2 k ? , 1% panasonic erj3ekf 3322v 1 k ? , 1% panasonic erj3ekf 1001v 50 m ? , 1% panasonic erjb1cfr05u ss3h10 schottky , 3 a, 100 v r 10 nf x7r panasonic 10 k ? , 1% erj3ekf 1002v quantity 10 1 2 1 1 1 1 1 1 1 1 1 1 1 1 transistor infineon ipd35n10s3l-26 alternativ: 100v n-ch, 35a 2 transistor infineon bsp318s alternativ : 60v n-ch, 2.6a 2 www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 33 rev. 1.0, 2010-10-13 TLD5098EL application information figure 21 sepic application circuit figure 22 bill of ma terials for sepic application circuit en / pwmi comp in fbh fbl ovfb swo swcs freq / sync pwmo gnd sgnd ic 1 tld5098 v batt v in ivcc provisional parts i sw c in c 1 c 2 l filter d rv l 1 d bo t sw r cs r fr eq r comp c comp c ivcc r ovh r ovl c bo r fb t dim 14 13 11 8 12 5 7 6 9 3 4 2 v ref i led c sepic l 2 1 d pol r pol ic 2 microcontroller (e.g. xc866) output output input set 10 pwm - output r filter c filter pwm v cc or v ivcc d 1 d n number of leds could be variable! this means the following configurations are possible: 1) v out < v in (buck) 2) v out > v in (boost) startup circuit bas1603w 10k ? l 1 , l 2 reference designator d bo part number manufacturer c in , c bo t dim ,t sw r cs r fb r ovh d 1 - n r ovl c comp r comp, r pol c ivcc r freq ic 2 ic 1 osram lw w5sm vishay coilcraft mss1278t-473ml eeefk 1h101gp panasonic value white 47 uh 100 uf, 50v epcos type led diode capacitor capacitor capacitor ic ic inductor resistor resistor resistor resistor resistor resistor transistor epcos 1uf , 6.3v mlcc ccnpzc105kbw x7r infineon tld5098 -- infineon xc866 -- infineon ipg20n06s4l-26 dual n-ch enh. (60v, 20a) 820 m ? , 1% panasonic erj14bqfr82u 20 k ? , 1% panasonic erj3ekf 2002v 33.2 k ? , 1% panasonic erj3ekf 3322v 1 k ? , 1% panasonic erj3ekf 1001v 50 m ? , 1% panasonic erjb1cfr05u ss3h10 schottky , 3 a, 100 v r 10 nf x7r panasonic 10 k ? , 1% erj3ekf 1002v quantity variable 1 2 1 1 1 1 2 2 1 1 1 1 1 1 transistor infineon ipd35n10s3l-26 alternativ: 100v n-ch, 35a 2 transistor infineon bsp 318s alternativ : 60v n-ch, 2.6a 2 inductor coilcraft msd1278-223mld alternativ: 22uh coupled inductor 1 c sepic x7r, low esr epcos 3.3 uf, 20v capacitor 1 d pol diode 80v diode infineon bas 1603w 1 www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL application information datasheet 34 rev. 1.0, 2010-10-13 figure 23 led high side return applic ation circuit (boost to vbb, b2b) figure 24 bill of materials for led high side return application circuit in fbh fbl ovfb swo swcs pwmo gnd sgnd ic 1 tld5098 14 5 12 9 3 4 2 6 7 en / pwmi comp ivcc input ic 2 microcontroller (e.g. xc866) output output 13 11 8 1 v batt v in c in c 1 c 2 l 1 t dim1 provisional parts d rv l bo d bo i led v out r fb d 1 d n t dim2 r ovh r ovl t sw r cs i sw r freq r comp c comp c ivcc c bo r dim2 r dim1 d z freq / sync v cc or v ivcc d3 power schottky diode short to gnd short to gnd dsc2: low power diode rlim:10k ? range dsc1: low power diode set 10 pwm-output r filter c filter pwm v out is always higher than v in therefore: number of leds could be variable! l bo reference designator d bo , d 3 part number manufacturer c bo t dim1 ,t dim2 r cs r fb r ovh d 1 - n r ovl c comp r comp, r dim1, r dim2, r lim c ivcc r freq ic 2 ic 1 osram lw w5ap vishay coilcraft mss1278t-104ml_ eevfk 1k101q panasonic value white 100 uh 100 uf, 80v epcos type diode diode capacitor capacitor capacitor ic ic inductor resistor resistor resistor resistor resistor resistor transistor epcos 1 uf, 6.3v mlcc ccnpzc105kbw x7r infineon tld 5098 -- infineon xc866 -- infineon bso615cg 60v dual n-ch (3.1a) and p-ch. enh. (2a) 820 m ? , 1% panasonic erj14bqfr82u 20 k ? , 1% panasonic erj3ekf 2002v 33.2 k ? , 1% panasonic erjp06f5102v 1 k ? , 1% panasonic erj3ekf 1001v panasonic ss3h10 schottky , 3 a, 100 v r 10 nf x7r panasonic 10 k ? , 1 % erj3ekf 1002v quantity variable 2 1 1 1 1 1 1 4 1 1 1 1 1 1 appdiagled _hsr_hssbom .vsd t sw transistor infineon ipd35n10s3l-26 n-ch, optimos-t2 100v, 35a 1 c in eeefk 1h101gp panasonic 100 uf, 50v capacitor 1 50 m ? , 1% erjb1cfr 05u d z -- diode -- zener diode 1 transistor infineon ipd30n06s4l-23 alternativ: 60v n-ch, 30a 1 transistor infineon bsp 318s alternativ : 60v n-ch, 2.6a 1 transistor infineon bsp 123 alternativ: 100v n-ch (0.37a), 1 transistor infineon bsp 171p alternativ: 60v p-ch (1.9a) 1 d sc1 , d sc2 infineon diode bas 16-03w low power diode 2 www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 35 rev. 1.0, 2010-10-13 TLD5098EL application information figure 25 boost voltage application circuit figure 26 bill of materials for boost voltage application circuit note: this is a very simplified example of an application ci rcuit. the function must be verified in the real application. fbh fbl ovfb swo swcs gnd sgnd en / pwmi comp ivcc r freq r comp c comp 13 11 8 1 in v batt v in c 1 c 2 l 1 14 7 6 9 3 4 2 12 freq / sync c in d rv provisional parts v bo i bo l bo d bo t sw r cs r ovh r ovl c bo r fb1 r fb2 r fb3 r l pwmo 5 ic 1 tld5098 ic 2 microcontroller (e.g. xc866) output output input set 10 i sw i load v ref v cc or v ivcc c ivcc constant v out r filter c filter pwm l bo reference designator d bo part number manufacturer c bo r cs r fb1 ,r fb3 r ovh r ovl c comp r comp c ivcc r freq ic 2 ic 1 vishay coilcraft mss1278t-104ml_ eevfk1k101q panasonic value 100 uh 100 uf, 80v tbd type diode capacitor capacitor capacitor ic ic inductor resistor resistor resistor resistor resistor resistor panasonic 100 uf, 6.3v eefhd0j101r infineon tld5098 -- infineon xc886 -- 51 k ? , 1% panasonic erj3ekf 5102v 20 k ? , 1% panasonic erj3ekf 2002v 51 k ? , 1% panasonic erjp06f5102v 1 k ? , 1% panasonic erj3ekf 1001v panasonic ss3h10 schottky , 3 a, 100 v r 10 nf tbd tbd 10 k ? tbd quantity 1 1 1 1 1 1 1 1 1 2 1 1 1 t sw transistor infineon ipd22n08s2l-50 n-ch, 75 v, 65 m ? 1 c in eeefk1h101gp panasonic 100 uf, 50v capacitor 1 50 m ? , 1% erjb 1cfr05u r fb 2 resistor 1 k ? , 1% panasonic erj3ekf 1001v 1 www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL application information datasheet 36 rev. 1.0, 2010-10-13 11.1 further application information in fixed frequency mode where an external resistor conf igures the switching frequency the minimum boost inductor is given by the formula in figure 27 . ?l min = minimum inductance required during fixed frequency operation ?v bo = boost output voltage ?r cs = current sense resistor ?f freq = switching frequency figure 27 minimum inductance required during fi xed frequency operation (b2g configuration) in synchronization mode where an external clock source configures the switching frequency the minimum boost inductor is given by the formula in figure 28 . ?l sync = minimum inductance required during synchronization operation ?v bo = boost output voltage ?r cs = current sense resistor figure 28 minimum inductance required during sy nchronization operation (b2g configuration) ? please contact us for information regarding the fmea pin. ? existing app. note (title) ? for further information you may contact http://www.infineon.com/ l min v bo v [] r cs [] 106 3 ? 10 v [] f freq hz [] ------------------------- ------------------------ ------------------- l sync v bo v [] r cs [] 106 3 ? 10 v [] 250khz ----------------------------------- ------------------------ www.datasheet.net/ datasheet pdf - http://www..co.kr/
datasheet 37 rev. 1.0, 2010-10-13 TLD5098EL package outlines 12 package outlines figure 29 pg-ssop-14 green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. gree n products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). pg-ssop-14-1,-2,-3-po v02 1 7 14 8 14 17 8 14x 0.25 ?.05 2) m 0.15 d c a-b 0.65 c stand off 0 ... 0.1 (1.45) 1.7 max. 0.08 c a b 4.9 ?.1 1) a-b c 0.1 2x 1) does not include plastic or metal protrusion of 0.15 max. per side 2) does not include dambar protrusion bottom view ?.2 3 ?.2 2.65 0.2 ?.2 d 6 m d 8x 0.64 ?.25 3.9 ?.1 1) 0.35 x 45? 0.1 cd +0.06 0.19 8 ? max. index marking exposed diepad pg-ssop-14 for further package information, please visit our website: http://www.infineon.com/packages . dimensions in mm www.datasheet.net/ datasheet pdf - http://www..co.kr/
TLD5098EL revision history datasheet 38 rev. 1.0, 2010-10-13 13 revision history revision date changes 1.0 2010-10-13 initial datasheet www.datasheet.net/ datasheet pdf - http://www..co.kr/
edition 2010-10-13 published by infineon technologies ag 81726 munich, germany ? 2010 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. www.datasheet.net/ datasheet pdf - http://www..co.kr/


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